Analysis of CAN bus timing and synchronization mechanism

introduction

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CAN (Controller Area Network) is a serial communication network that effectively supports distributed real-time control. Considering the bit timing synchronization method, it is essentially an asynchronous communication protocol, starting with a frame start bit for each frame transmitted, and ending with a frame end and subsequent intermittent fields. This requires the receiving/transmitting parties to maintain strict synchronization of each bit in the intra-frame information code from the start of the frame. Considering the bit timing coding, it adopts the non-return-to-zero coding method. The bit stream transmission does not directly represent the synchronization signal with the level change like the differential code. Therefore, to ensure the synchronization quality, the CAN protocol defines its own bit synchronization mode. : Hard sync and resynchronization.

At present, the relevant literature lacks detailed analysis of CAN bus timing and synchronization mechanism. This paper deeply analyzes the structure of the CAN bus bit period and the two bit synchronization modes of CAN (hard synchronization and resynchronization), and clearly gives the relationship between resynchronization jump width and phase difference compensation during resynchronization. The setting of parameters has a good reference value.

Sp; bit period structure

The standard bit rate of the network, which is the amount of time (also known as the standard bit period). As shown in Figure 1, the amount of time for the CAN bus is composed of four parts: the sync segment (SYNC_SEG), the propagation segment (PROP_SEG), the phase buffer segment 1 (PSEG1), and the phase buffer segment 2 (PSEG2). So the nominal time is, the segments in the bit period are programmable and can be represented by an integer number of basic time units (time shares). This basic time unit is divided by the oscillator (BRP is the baud rate prescaler and can also be programmed).

Figure 1 Structure of CAN bus amount positioning time

The sync segment is the beginning of each bit in the CAN bus bit period. Whether the transmitting node sends a bit or the receiving node receives a bit is started from the sync segment. However, due to the network transmission delay and the physical interface delay between the sending node and the receiving node, after the transmitting node sends one bit, the receiving node delays receiving for a period of time. Therefore, the sending node and the receiving node correspond to the same bit synchronization segment starting time. There is a certain delay, recorded as.

The setting of the propagation delay segment is to compensate for the delay () of the segment. The non-destructive arbitration mechanism and the intra-frame response mechanism in the CAN bus protocol require that the transmitting node that is transmitting the bit stream can simultaneously receive the "dominant bit" (logic 0) from other transmitting nodes, otherwise the arbitration will be invalid. Or answer the error. The propagation delay segment delays the sampling points of nodes that may sample the bus bitstream earlier, ensuring that the bitstreams sent by the various transmitting nodes arrive at all nodes on the bus before sampling begins.

The resynchronization jump width SJW is not a segment in the bit period, but it is an important indicator in the bit timing calculation. It defines that the phase buffer segment 1 or the phase buffer segment 2 is increased in the time of resynchronization to compensate the phase error bit time. Or the maximum number of basic time units that are shortened. Synchronization mechanism

The bit synchronization of the CAN bus is only generated when the node detects a transition from "recessive bit" (logic 1) to "dominant bit" (logic 0), when the edge of the transition is not within the sync segment of the bit period. A phase error will occur. This phase error is the distance between the edge of the transition and the end of the sync segment. If the edge of the transition occurs before the sync segment, the phase error is positive; if the edge of the jump is located before the sync segment, the phase error is negative. The phase error is due to the oscillator drift of the node, the propagation delay between the network nodes, and noise interference. The CAN protocol specifies two types of synchronization: hard synchronization and resynchronization.

Hard synchronization

Hard synchronization is only done with a falling edge (frame start) when the bus is idle, and the bit time of all nodes restarts with or without phase error. The transition that forces the hard sync to occur is within the sync segment that is at the restarted bit time.

Resync

In subsequent bits of the message frame, whenever there is a transition from a "recessive bit" to a "dominant bit" and the transition falls outside of the sync segment, a resynchronization is caused. The resynchronization mechanism can adjust the position of the sampling point according to the edge of the jump or shorten the bit time to ensure correct sampling.

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As shown in Figure 2, the edge of the transition falls before the sample point after the sync segment, which is a positive phase error. The receiver considers this to be a hysteresis edge sent by a slow transmitter. At this point, the node will grow its own phase buffer segment 1 (shaded portion) in order to match the transmitter's time. The time of growth is the absolute value of the phase difference, but the upper limit is the resynchronization jump width SJW.

As shown in Figure 3, the edge of the transition falls before the sync segment before the sample point, which is a negative phase error, which the receiver interprets as the leading edge of the next bit period sent by a fast transmitter. In order to match the transmitter's time, the same node will shorten its phase buffer segment 2 (shaded portion), and the next bit time will start immediately. The shortened time is also the absolute value of the phase difference, and the upper limit is the resynchronization jump width SJW.

Figure 2 Resynchronization with positive phase error

p; Figure 3 Resynchronization with negative phase error

The phase buffer segment is only increased or shortened during the current bit period. The next bit period will be restored to the programmed default value of the bit time as long as there is no resynchronization.

When the absolute value of the phase difference is less than or equal to the resynchronization jump width SJW, the effects of resynchronization and hard synchronization are the same, and the phase difference compensation can be realized; but if the absolute value of the phase difference is larger than the synchronous jump width, The maximum value of the compensation is the resynchronization jump width, so that resynchronization cannot completely compensate for the phase difference.

In addition to the transparency of the data of the arbitration field, the control field, the data field and the CRC sequence, the bit filling mechanism of the CAN protocol also increases the chance of jumping from the "recessive bit" to the "dominant bit", that is, increasing the weight. The number of synchronizations improves synchronization quality. In the absence of error, the bit-fill principle guarantees that there will be no more than 10 bit periods (ie, 5 dominant bits, 5 recessive bits) between the two resynchronization jump edges, and the actual system will An error has occurred, so that the interval between the actual two resynchronization jump edges may be 17 to 23 bit times (active error flag and its superposition of 6 to 12 bit times, error delimiter 8 bit time, intermittent field) 3 bit time).

Conclusion

In the actual system design, the user can optimize the setting of the bit timing parameters of the CAN controller according to the oscillator clock frequency, the bus baud rate and the maximum transmission distance of the bus [4, 5], and coordinate the influence bit timing setting. The two main factors: oscillator tolerance and maximum bus length, reasonable arrangement of the sampling point position and sampling times in the bit period, to ensure the effective synchronization of the bit stream on the bus, optimize the communication performance of the system, and further promote the wide range of CAN bus application.

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